DSOs’ features target serial buses
01 April 2007
Three oscilloscopes launched by Tektronix (www.tek.com) span three bandwidths of 12.5GHz, 16GHz and 20GHz. The DSA71254 (12.5GHz), the DSA71604 (16GHz) and the DSA72004 are DSP-based instruments with a ‘bandwidth dial’ which users can access to optimise each instrument’s bandwidth to match a specific measurement application.
Parallel buses are giving ground to serial buses. As serial buses are increasingly used, analysis and debug can be carried out over multiple transmission paths. Engineers are also required to interpret logical and physical behaviour of these multiple signals.
The second generation of serial buses, PCI Express, Serial ATA for example, deliver higher data rates than parallel buses, and in multiple lanes, ranging from four to 32 lanes.
SerDes (serialisation/deserialisation) device technology is able to free up the physical layer architecture from clock timing and data synchronisation so that related and loosely aligned packet segments traverse discrete lanes between transmitter and receiver.
Serial buses are also popular because they use the 8b/10b encoding format. This is where 8bit data Bytes are converted into 10bit symbols for serial transmission. The format, while ensuring a balanced mix of binary units, to simplify clock recovery and assisting with error detection, adds a layer of abstraction and complexity in acquiring signals for validation, compliance and troubleshooting.
To answer physical layer and protocol acquisition requirements, the analysers capture the signal with the analogue detail and decodes complex packet data without being limited to purely binary, or digital, capture.
The serial device validation, compliance measurements and debugging functions are all integrated. Debugging and validation on a multi-lane serial bus requires the capture of real-time data across all lanes simultaneously. By capturing up to 4msec of high-speed serial data traffic at the full realtime sample rate, engineers can investigate the context in which an error occurred. Capturing the data across all lanes means that events preceding and following it on every lane can be analysed.
For debugging, multi-lane acquisition enables designers to observer the interactions among the lanes. In compacted circuits, transients can propagate across the signal paths, resulting in crosstalk. The DSA7000’s
ability to acquire four channels, or lanes, simultaneously at full sample rate, can make it easier to identify straying between the lanes.
Jitter analysis is another feature that the series of scopes exploits, with the ability to acquire all four channels at once to analyse characteristics, such as time interval error and random and deterministic jitter.
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