Enabling the future of linear regulators
21 April 2008
Some of the oldest and most popular integrated circuits in the electronic industry are linear regulators, and there have been significant performance improvements since their introduction.
Essentially, a linear regulator circuit consists of four functional blocks; the reference, the pass element, the sampling resistor, and the error amplifier (as shown in figure 1).
The error amplifier of the IC controls the pass element and monitors the feedback whilst comparing it to a fixed internal reference. It then either opens or restricts the pass element to maintain a constant output voltage over variation in the input voltage and the output current required by the load.
Dropout voltage is defined as the minimum voltage difference required between Vin and Vout for the regulator to operate within specification.
Usually, linear regulators with a dropout voltage of <1V are considered as low dropout voltage regulators (LDOs). Anything with dropout voltages >1V are considered to be a standard linear regulator. LDOs are required if the input voltage is allowed to come close to the output voltage and if power dissipation should be minimised.
Quiescent, or ground current, is the difference between input and output currents. Low quiescent current is
necessary to maximise the efficiency. Quiescent current consists of bias current (such as band-gap reference, sampling resistor, and error amplifier currents) and the gate/base drive current of the series pass element, which do not contribute to output power. The series pass element and the regulator topology largely determine the quiescent current.
Classification of linear voltage regulators
The classification of linear voltage regulators is based on pass element technology; NPN-Darlington, NPN, PNP, PMOS, and NMOS regulators.
Traditionally, the PNP bi-polar transistor has been applied to LDO applications because it enables a low voltage. However, it has a high quiescent current and low efficiency, which are not ideal when maximising efficiency. PMOS devices now have performance levels exceeding most bi-polar devices. The NMOS pass element has low resistance. Unfortunately, the gate drive difficulties make it less than ideal in applications. NMOS LDOs achieve dropout voltages as low as 120mV at 3A output current.
Unlike a PMOS topology device, the output capacitor has little effect on loop stability. Many NMOS LDOs are stable, even without an output capacitor. Transient response is also superior to PMOS topologies, particularly for low Vin applications.
The simplest linear voltage regulators only have three terminals for Vin, Vout, and GND. The next step in the linear regulator evolution was to add an enable pin in order to turn the regulator on and off.
Reliability requirements of digital applications created the demand to integrate supply voltage supervisor functions. These provide either a reset or power-good output to the processor. An internal comparator monitors the regulator output voltage and initiates a reset in digital systems in the event of an undervoltage condition. When the output reaches regulation, reset is released after a certain time delay (usually between 20 and 200ms). Reset is asserted again when the output voltage drops below a hysteresis window of the required output voltage.
Power good indicates the status of Vout and is often used to enable other power supplies for sequencing purposes. When Vout exceeds the power good trip threshold (usually 97 per cent of the set point voltage), the Quiescent current pin goes into a high-impedance state. Otherwise, Quiescent current is driven low.
Power supplies for PLL and RF circuits require low noise power supplies for maximum performance. Filtering the reference voltage of an LDO is a very effective way to obtain a low noise power supply. LDOs that support this function have a bypass pin to connect a filter capacitor between the reference output and the input of the error amplifier. The TPS79101 is a good example for such an LDO and generates only 15ΩVRMS of noise in a 100Hz to 100kHz range.
Complex digital devices like FPGAs and processors sometimes exhibit high inrush current during turn on. This inrush current is reduced when the supply voltage is turned on with a slow ramp. To accomplish this task, LDOs like the TPS74401 have an integrated soft start function that allows the user to programme the slope of the voltage ramp during start up.
Voltage tracking is another feature that is required in complex digital systems. This feature is useful in minimising the stress on ESD structures that are present between the CORE and I/O power pins of many processors. Tracking allows the LDO output voltage to track an external supply.
Selecting the right linear regulator
The selection of linear regulators begins with the required input voltage range, output voltage, and current. If the input voltage is allowed to come close to the output voltage, it is important to ensure that the minimum dropout voltage does not limit the required input voltage range. It is also important to match the output voltage it is essential to verify whether specific characteristics like low noise or special output capacitors are required. Finally, additional functions like enable, power good or sequencing are considered. Another is the application of specific thermal considerations.
Most LDO regulators specify a maximum junction temperature to assure their operations. This restriction limits the power dissipation handled in a given application. Neglecting quiescent current, the actual PD (power dissipation) can be calculated:
PD = (Vin – Vout) • Iout
The following equation is needed to calculate the maximum allowable dissipation, PD(max):
PD(max) = TJ,max – TA
[W]
RèJA
Where:
TJ,max is the maximum allowable junction temperature. [°C]
TA is the ambient temperature [°C]
RèJA is the thermal resistance junction-to-ambient for the package [°C/W]
To ensure that the junction temperature is within acceptable limits, PD must be less than or equal to PD(maximum).
The power is dissipated by the linear regulators’ package and external heat sinks. Factors that influence thermal performance include PCB design, component placement, interaction with other components on the board, airflow, and altitude.
MARCUS ZIMNIK is field application engineer, power management products, Texas Instruments
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