Signalling faster, better imaging
01 October 2008
The creation of new generation signal chain components like high-speed data converters has allowed medical imaging system designers to improve image quality and to reduce power consumption and the size of their systems
Three major segments to benefit in terms of faster, better resolution images are ultrasound, MRI (magnetic
resonance imaging), CT (computed tomography) and PET (positron emission tomography), with correspondingly better diagnostic results for the patient.
Most medical imaging techniques involve arrays of sensors receiving a signal from the patient, whether a reflected acoustic wave in ultrasound, magnetic field disturbances in MRI, or positron emissions in PET. It might be deduced therefore, that the most straightforward way of improving image quality, is simply to increase the size of these sensor arrays, but this then requires more signal chains, making the system bigger, using more power and multiplying the cost. Furthermore, improving one aspect of performance can cause a whole host of other design challenges in other areas.
Elements of the imaging receiver
In most cases, each sensor array element requires its own signal chain to convey and convert the small analogue signal responses into digital before processing. Typically, multiple active elements are involved in each signal’s conversion process: a LNA (low noise amplifier) and a further amplifier stage to provide gain to meet the input range of the ADC (analogue to digital converter).
Applications like MRI can use fixed gain stages, because signal amplitude swings are not normally large. However, ultrasound systems with high variance in signal strength, require VGAs (variable gain amplifiers) and possibly PGAs (programmable gain amplifiers) to precede the ADC. After the ADC, the signal is digital
and is usually sent via an FPGA (field programmable gate array) for processing and conversion into a final image.
For MRIs, there can also be a series of mixing stages between the LNA and amplifier to down convert the radio frequency (RF) energy of the magnet to lower frequencies. With three or more devices required per element, a two-fold increase in sensors may require as much as a six- to 10-fold increase in analogue
components just for the receive signal chain, not to mention more power! Hardly surprising that system designers press component suppliers for solutions.
The innovative integration of more and more active analogue devices onto a single chip has made a huge difference. Consider a typical ultrasound receive chain for example, in which there might be four devices per
sensor, three of which are amplifiers. With modern design and processing, devices now combine the LNA, VGA and PGA in one VGA, cutting the number of chips by one-third over a discrete solution. Many designs go a step further by integrating multiple VGA channels into one IC. The new VCA8500 from Texas Instruments, which includes eight VGA channels in a single 64pin QFN package IC, is a good example. This device even integrates a low-pass anti-aliasing filter after the PGA, which allows direct connection of the VGA output with the input of an ADC, thereby eliminating the need for other external components and saving board space. In
figure 1, note that other medical imaging function blocks like a CW (continuous wave) switch matrix and clamping circuit are also integrated into this device.
Integrating multiple channels and components into one device also provides other benefits, including lower power consumption. Typically, components are designed to achieve a standalone balance of power and performance, and whilst they will work with one another, each component is likely to perform better than it needs to for the system. Consequently, components tend to skew the balance towards overperformance at the expense of more power. This is not the case, however, when multiple stages are integrated into a single device. Multi-stage ICs can be designed to allocate power most efficiently and not waste it on blocks where it is not needed.
The newer VGAs are good examples. Because low noise is critical to ultrasound imaging systems, the LNA function is essential to the VGA design. Its input noise sets the minimum achievable noise figure for the system, while its gain also directly affects the amount of noise from subsequent stages impacting the final NF (noise figure). By balancing and fine-tuning the power versus performance in the LNA stages, lower power designs can be achieved while improving the performance of the VGA. This is illustrated in figure 2. Previous generation multi-channel VGAs tended to lie upon a trend line trading off power and input referred noise. A design that only consumed 75mW per channel could be used if 1.2 input referred noise was adequate. Alternatively 0.7 input referred noises could be achieved if 150mW per channel did not overload the power budget. Now, however, thanks to very efficient low noise BJTs (bipolar junction transistors) and optimised front-end design, the VCA8500 generation of VGAs enables 0.8 input referred noise for only 63mW per channel. This is well inside the previous generation’s trend line and allows highperformance
imaging systems to draw less power, to become smaller and more portable.
Squeezing the Power
ADCs have been subject to similar integration. Many current designs offer eight high-speed ADC channels to match eightchannel VGAs, typically with resolutions from 10bit to 14bit and speeds from 40Msample/sec to 65Msample/sec. By incorporating output standards like DDR LVDS (double-data rate, low-voltage
differential signal swing) these octal ADCs also reduce the number of output pins per ADC, allowing them to fit into small packages. Additionally, the serialised data format reduces the number of I/O traces between the ADCs and the digital processing engine, an extremely important feature when laying out a circuit board with multiple eightchannel ADCs.
Just like VGAs, the power consumption of ADCs has been reduced dramatically without affecting performance. Because of the noise and linearity constraints in medical imaging, efficient amplifier stages usually employ processes like SiGe to use low-noise BJTs. These processes offer an outstanding balance of low noise, low power and high linearity for typical response frequencies from DC to 20MHz. Conversely, high-speed ADCs with the typical sampling rate needed for medical imaging generally employ CMOS
technology because this offers a good balance between power and performance for 10bit to 14bit resolution converters up to and beyond 65Msample/sec.
CMOS technology advances have significantly reduced the power consumption characteristics and footprint of ADCs without affecting their noise and distortion performance. TI’s ADS5281 is a good example reducing power by nearly 50 per cent and footprint by almost 60 per cent over previous generation octal designs, whilst maintaining 12bit resolution with 70dB SNR. The CMOS-based ADC also allows designs that dynamically scale power consumption with sample rate. As the sample rate is lowered, less power is
demanded by the ADC core and data output blocks. Highly power-efficient ADCs can scale their power requirements depending on the sampling clock input to the IC.
Figure 3 shows how the ADS5281/82 scales over sample rate. At the high-end of 65Msample/sec the device consumes 77mW per channel, but at a lower speed of 20Msample/sec, it only consumes 43mW.
i.e. 45 per cent less power. This allows the ADC to switch into a power saving mode, while still being able to convert limited analogue signals to digital.
Increases in ADC performance with respect to IF (input frequency) have allowed completely new MRI.system architectures. The main magnets of MRI machines produce a narrow-band IF in the 30MHz to 140MHz range, dependent on the strength of the main magnetic field. Traditional architecture mixes the IF down to near DC where it can be sampled by a precision delta-sigma ADC. Newer 14bit and 16bit ADCs can easily sample IFs in this range while maintaining high performance, even when they undersample
signals in the higher IF range. With digital decimation and down conversion, these ADCs can achieve similar SNR to the traditional architecture, saving board space and analogue mixing elements, while improving imaging performance. Such continuing improvements will potentially enable high quality diagnostic imaging machines, which can be taken to the patient instead of the patient having to travel to the machine.
CHARLES (CHUCK) SANNA is product marketing engineer, ADCs, DACs, Texas Instruments
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