The programmable imperative – reaching the tipping point
18 May 2009
Why the shift from ASICs to FPGAs is mandated by business conditions and how FPGAs are key to emerging markets.
Designers have spoken – the defining Integrated Circuit (IC) technology for the 21st century is the Field Programmable Gate Array (FPGA), with traditional gate arrays and structured arrays relegated to specialised high-volume tasks. Whether performing critical functions or utilised at the heart of the system itself, today’s FPGAs deliver the performance, cost, power-consumption and capacity that at one time could only be met by custom ICs or Application-Specific Standard Parts (ASSPs).
The underlying configurability of programmable hardware not only delivers the traditional benefits of competitive differentiation and fast time to market, but also delivers a return on investment when volumes don’t justify the cost of developing custom ICs. The arrival of today’s advanced FPGA technologies in this time of financial and economic uncertainty comes at a ‘tipping point’ such that hardware programmability has become an imperative for electronic systems manufacturers as risk management and the ability to adapt to market dynamics become more critical to their survival. But to be truly agile, development teams need new methodologies that support their tight development cycles and even tighter budgets on top of increasing product and technological complexity.
A broader FPGA utilisation model
A recent study undertaken by Piper Jaffray, EE Times, and the FPGA Mission Assurance Center at Kirtland Air Force Base, underscored what many in the industry intuitively assumed: the use of gate arrays, structured ASICs, and cell-based ASICs is beginning to plateau, with FPGAs displacing all categories to some extent. The trend is particularly evident in gate arrays, where 65% of respondents said the use of gate arrays would remain the same, and 12.8% said their use would decrease greatly. By contrast, more than 72% of respondents said that FPGA use would increase greatly, while 27% expected them to stay the same. Virtually no respondents expected FPGA use to decrease.
The FPGA now is retained from the early-availability runs through the entire life of the end product. When taking into consideration the high number of devices needed to be sold in order to realise an acceptable return on investment on a custom IC development, the difference between the higher unit cost of an FPGA device versus an IC becomes irrelevant.
As FPGAs are employed in new baseband wireless and image-processing systems, the type of engineers utilising FPGAs has also expanded. In the 1990s, the FPGA user base consisted almost solely of hardware designers. Today, a broader base of IP cores and user-friendly EDA tools has made it easier for system integrators, DSP developers, and even embedded software engineers to innovate with FPGAs. Among FPGA users, the Piper Jaffray study indicated 73% were working on embedded designs. Some 74% of respondents in that survey reported using embedded processors in their projects. Hard-coded processors, power architectures in particular, were in a significant lead, though soft synthesisable cores like the Xilinx Microblaze™ processor were growing quickly.
Nowhere is the adoption of programmable logic more abundantly evident than in aerospace and defence. The shift to FPGA solutions in military contractors has been so rapid and profound that the Air Force Research Labs established the new FPGA Mission Assurance Center at Kirtland Air Force Base in New Mexico. While 42% of respondents of the Piper Jaffray survey said they would be hiring more FPGA designers next year, that number rose to 48% when looking specifically at the aerospace and defence industry.
The programmable imperative
The time is ripe for a shift to programmability. In the early days of the FPGA industry, programmable logic was most often seen at the periphery of the system, consolidating glue logic in I/O or secondary control subsystems. Today, FPGAs have moved to the heart of the system. When FPGAs take on the central control or Digital Signal Processing (DSP) duties, all system differentiation can reside in the FPGA. Even when the FPGA plays a companion role to a standard CPU or DSP, much of the differentiation may reside in the FPGA, due to the increased performance and functionality possible in the FPGA. In either case, the role of the FPGA is changing the way IC design is accomplished throughout the system.
The move to FPGAs holds even greater viability in times of financial constraint. The growth of Non-Recurring Engineering (NRE) costs in traditional custom design flows can scarcely be justified in a time of engineering budgets with hard and fast caps. FPGAs offer a lower cost of design than any custom method.
Indeed, when Xilinx CEO Moshe Gavrielov speaks of “the programmable imperative,” he means that a shift from traditional ASICs is virtually mandated by business conditions. NRE costs for traditional gate arrays and cell-based ASICs are growing with each change in process node. The shrink from 90 nm to 65 nm feature size, in particular, leads to significant up-front costs in traditional ASIC design. Industry research firm iSuppli reports traditional ASIC revenue declining from 32% of overall logic IC revenue in 2000, to 20% in 2008. Even the developers of ASSPs face pressures in the new financial environment, particularly if the chosen end market for a specific device faces constraints.
The traditional ASIC will not disappear tomorrow. ASICs are being targeted toward stable products produced in extremely high volumes. However, an increasing number of end products, even ones with volumes in hundreds of thousands or millions of units, can no longer afford ASICs with mask costs skyrocketing from about $1 million at 90 nm to about $12 million at 32 nm. The EDA tool vendors serving custom architectures will also face steeper price increases as they invest more R&D to keep pace with process technologies. Today’s generation of FPGAs, on the other hand, gives systems houses access to advanced process technology without having to shoulder the burden of IC development costs.
The cost advantages of FPGAs extend beyond original designs, to the re-implementation of obsolete ASSPs in FPGAs. When converting existing or upgraded designs to FPGAs, developers will find that it can be easier to scale product generations across process nodes. Adding new features and capabilities through the use of a programmable architecture can extend the practical shelf life of the end product.
Reusable IP cores, while available in some array- and cell-based technologies, are best suited to FPGA product families, and can be scaled across product lines. This allows a systems house to address spiraling design complexity difficulties, while allowing greater product sophistication for each member in a product family.
In an era characterised by extremely short product lifecycles and narrow market windows, FPGAs require less time to develop than traditional ASICs. In consumer realms, average product lifetimes, formerly measured in three- to five-year periods, have now shrunk to a year or less. Even in vertical markets such as communications and mil-aero, formerly characterised by 20-year product lifecycles, the lifetime of a typical product has now shrunk to a decade or less. The added challenge of fickle end-user tastes and problematic customer demands also works in the favor of FPGA reprogrammability, which means that changes can be made throughout the product lifecycle.
In fact, the uncertainty of developing for consumer markets such as LCD displays, set top boxes and the like has all but warranted the use of FPGAs as a standard feature. Despite the use of focus groups and one-to-one consumer studies, systems manufacturers are finding it difficult to gauge the product requirements for an upgrade six months or even six years out. Consequently, many manufacturers are developing products with a core set of capabilities sharing a common low-cost FPGA implementation. By making the FPGA a key instrument of differentiation for features such as protocol support or image processing, manufacturers also have the flexibility to make changes during the product development cycle and address new markets as they emerge.
The Xilinx imperative
Xilinx has found that the key to extending FPGA penetration into new vertical markets is the availability of targeted design platforms. More than a mere hardware development kit, these platforms include third-party IP cores developed by Xilinx and its third-party network, as well as software suites to ease development. The Xilinx FPGA is the core engine of the targeted design platform, with the new Virtex-6 and Spartan-6 devices delivering twice the capacity, up to 50% reduction in system costs, and 65% lower power consumption than previous families.
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