Dynamic applications of new technology
22 July 2009
Reconfigurable logic technology is out to challenge custom RTL with its claims of lower cost and lower risk for semiconductor companies. The ART2 IP, from Akya Holdings, allows designers to reconfigure the whole device depending on its future application. By separating the design of the data path from the control logic, designers can reduce cost and risk as the control flow can be modified after the design is in place. “ASSP manufacturers are having trouble filling volume at advanced nodes and the model is no longer financially viable. Everytime they market a device, customers want to change something. Effectively, this means ASSP’s are actually becoming ASICs. Our technology gives them the ability to consolidate over 20 different devices and the potential savings in NRE reduces the cost of manufacturing,” said Colin Dente, CEO of Akya.
Akya’s technology enables designers to create ICs that can change according to requirements without the need to redesign the silicon. “Other companies try to build a completely general purpose device. That device is completely programmable but the trouble is it comes with big overheard either on area or power as there is much functionality that is never used,” added Dente.
The data path elements are fixed hardware with a reconfigurable interconnection between them and the firmware runs on sequences which define the functions on a clock-cycle by clock-cycle basis. Dente commented: “By including reconfigurable technology, you have the chance to use any given piece of silicon for more applications.” The ART2 IP enables 'flexible designs which allow modifications without new silicon, supports multiple design variants with a single silicon design, and allows designers to fix bugs after tape-out.'
To additionally speed up the design process, The ART2 development kit comes with two high-level languages – a verilog-like language for defining the data path called the AAD, and AAL in which the firmware is written and is like an assembler. “The development time of a function compared to verilog or VHDL is approximately halved,” said Dente. The ART2 is suitable for ‘low-power applications such as mobile handsets and portable media players’ and is primarily aimed at products using DSP functions.
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