New 10bit 3Gsps DMUX
01 March 2010
e2v’s new EV10CS140TPY series are high speed 10bit 3 Gsps demultiplexers (DMUX).
Designer and manufacturer of components, e2v, has announced the launch of a high speed 10bit 3Gsps DMUX featuring LVDS compatible differential data and clock inputs for easy interface into Digital Signal Processor (DSP) or industry standard FPGA. Applications include high speed data storage, test instrumentation, Automatic Test Equipment (ATE), Gigabit Ethernet and software defined radio.
It can be used as a standalone device for digital processing, or as a companion chip for e2v high speed ADCs, thanks to its ability to track the ADC output sampling rate over a wide operating frequency and temperature range. With the EV10CS140TP Series LVDS buffers, the DMUX can easily interface into standard 100ohm differentially terminated FPGAs or DSPs.
User-friendly features include timing synchronisation performed via an ASYNCRST control input for a master asynchronous reset, selectable Data Ready modes (DR and DR/2) for reducing the input clock speed by 50% and selectable data outputs (staggered and simultaneous modes) for reducing the data output by 50%. A (BIST) self-test and power-down mode is available with a power consumption of 1.9W.
Andrew Benn, Product Marketing Manager of e2v’s Specialist Semiconductors division commented: "Availability of our 10bit 3Gsps DMUX now allows digital and analogue designers to take full advantage of next generation applications where Gigahertz data rates are beyond the performance of current industry standard DSPs and FPGAs.”
The EV10CS140TP Series is now available in industrial (-40°C < Ta < 85°C) RoHS grade versions in an Enhanced Ball Grid Array (EBGA) 240 pin package (25mm x 25mm).
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