Mixed signal photos of earth
30 November 2010
The performance required of satellite-based photography, along with its hostile environment and absolute necessity for no-maintnentaince operation, has placed huge demands on the electronics. Paul McCormack describes a mixed-signal environment and introduces a new AFE to facilitate it.
Satellites orbiting at thousands of kilometres above the earth capable of capturing high resolution images of its surface are no longer just the stuff of science fiction movies. Increasingly earth observation payloads are being launched for a wide variety of applications, from weather pattern and environmental monitoring to surveillance and defence.
Images captured from space give us a much better understanding of our planet and its ecosystem. Indeed, a single satellite image can reveal more information in an instant than many cameras on the ground could capture. Launched by ESA (European Space Agency) in 2002, Envisat is the largest earth observation spacecraft ever developed. It carries ten sophisticated optical and RADAR instruments and has been used recently to monitor activity from the Eyjafjallajoekull volcano in Iceland, the giant iceberg breaking off the Petermann glacier in North-West Greenland, the wildfires in Russia and to aid disaster relief in Pakistan. ESA together with many satellite system developers are currently working on five new missions called Sentinels to be launched between 2011 and 2019. The Sentinel satellites will carry many precision optical instruments for a huge range of future monitoring projects.
Optical instruments operate by measuring sunlight reflected from the earth’s surface using sophisticated CCD or CMOS image sensing elements. CCD sensors have a slight performance advantage and are generally preferred for earth observation cameras.
The highest resolution systems contain hundreds of sensors. These sensors produce analogue signals that have to be converted to the digital domain by a low noise analogue front end. The front end electronics between the image sensors and digital processing elements is a critical part of a camera system. Block diagrams showing two different camera module architectures are shown in figure 1.
Traditionally the analogue front end (AFE) was developed using discrete radiation hardened ADCs and amplifiers. Although it would be desirable to place the analogue front end electronics on the same board as the CCD, it has been separated from the focal plane board containing the image sensors for noise and thermal reasons.
Image sensors must be shielded from surrounding noise and heat for optimal operating performance.
Improvements in resolution and GSD (Ground Sampling Distance) have been made by improving sensor technology. GSD is the area represented by each pixel in a digital photo of the ground from air or space. In an image with a one metre GSD, each pixel represents a ground area of 1 square metre. There is a demand to reduce GSD to 0.5 m and 0.25 m. The resultant advances in CCD technology development are driving the need for more highly integrated and lower power AFE circuitry.
The LM98640QML revolutionises satellite imaging by providing a level of integration that enables completely new camera architectures to be developed. The level of integration and associated power consumption allow the AFE to be placed on the focal plane board. This brings about several benefits, not only in terms of image quality, but it also eliminates the need for costly and heavy cables making imaging modules smaller, lighter and less costly to launch. The LM98640 is a dual 14-bit, 5 MSPS to 40 MSPS AFE.
The system block diagram shown in figure 2 highlights the main features of the device. Each input has its own Input Bias and Clamping Network and Correlated Double Sample (CDS) amplifier (which can also be configured to operate in Sample/Hold Mode). Two +/-8 Bit Offset DACs apply independent coarse and fine offset correction for each channel. A –3 dB to 18 dB Programmable Gain Amplifier (PGA) applies independent gain correction for each channel. The signals are digitised using two independent on chip high performance 14-bit, 40 MHz ADCs.
The LM98640QML provides two input sampling modes, Sample and Hold mode and Correlated Double Sample (CDS) mode. The desired sampling mode can be selected by correctly programming the configuration register.
Sample and Hold mode is enabled by default on power up. In Sample/Hold mode, a video level signal must be connected to the OSX-pin and a reference level signal must be connected to the OSX+ pin. Like other differential input sampling devices the digital output code will be the difference between the reference level and video level. A minimum code represents zero deviation between both inputs and a maximum code represents a 2 V deviation between the reference and video levels, with CDS and PGA gains of 1x. The full scale analogue input voltage can be increased to 2.85 V if the PGA again is set to the minimum level of –3 dB. The reference level signal can be either an external signal from the image sensor, or the VCLP pin can be externally connected to the OSX+ pin. In order to fully utilise the dynamic range of the input circuitry it is desirable to set the black level signal voltage as close to the reference level voltage as possible, resulting in a near zero scale output for black level pixels.
The LM98640QML provides several methods for ensuring the black level signal and reference level are matched. The SAMPLE pulse must be properly positioned over the input signal using the Sample Start and Sample End Registers. The sampling clock is divided by 64 so that the SAMPLE pulse can be programmed to start to within 1/64th of a pixel period.
To allow for settling and to reduce noise, the SAMPLE pulse should be made as wide as possible and fill the entire video level portion of the input signal. In CDS mode, both the reference level and video level signals should be connected to the OSX- pin. The OSX+ pin should not be left floating but should be bypassed to ground with a 0.1 uF capacitor. The CLAMP pulse is then used to sample the reference level and the SAMPLE pulse is used to sample the video level. The output code will be the difference between the reference level and video level.
The CLAMP and SAMPLE pulses need to be positioned correctly over the reference and video levels respectively using the Sample Start and Sample End Registers along with the Clamp Start and Clamp End Registers. In CDS mode, the input sampling amplifier has two physical paths through which a particular pixel will be sampled.
These two sampling paths are a requirement in the Correlated Double Sampling architecture. The sampling of the one pixel will travel the first path (arbitrarily called an even pixel), and the sampling of the next pixel will travel the second path (called an odd pixel). The sampling will continue in an even/odd fashion for all pixels processed in a particular channel. Due to slight variances in the sampling paths (most commonly a difference in switched capacitor matching), the processing of identical pixels through the two different paths may result in a small offset in ADC output data between the two paths.
To correct this, a simple digital offset can be applied in post processing to either the even pixel data or the odd pixel data. To simplify this action, the LM98640QML will indicate (with the TXFRM signal) whether the pixel travelled the even path or the odd path.
For all "Odd" pixels, the TXFRM signal is high for three TXCLK periods. For "Even" pixels, the TXFRM signal is high for two TXCLK periods.
Other features of the LM98640 include:
• Integrated 8-bit fine and coarse DACs for independent black level offset correction of each channel
• 21dB dynamic range PGA with 8-bit resolution to boost front end dynamic range
• Integrated LVDS serialiser to simplify routing and reduce cabling
• 1:2 demuxed output data option for reduced speed interface
• Adaptive power scaling feature to optimise power consumption under different operating conditions
• Complete evaluation system with software for device characterisation.
The LM98640QML is radiation tolerant up to a total ionizing dose of 100 krads allowing it to be used in space imaging applications. It is SEL immune and the configuration registers are SEFI (Single Event Functional Interrupt) immune up to 120 MeVcm2/mg. The Serial LVDS output is highly resistant to ionizing doses, preventing data loss.
PAUL MCCORMACK is National Semiconductor’s Marketing Manager, HSSP & Hi-Rel
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