Providing additional reach in long-haul networks
07 June 2011
PMC-Sierra’s POLO 40G SoC enables volume deployments of 40Gb/s coherent networks.
The PM6373 POLO 40G’s innovative technology enables volume deployments of 40Gb/s coherent for metro, regional and long-haul network build-outs.
This advanced SoC architecture doubles line card density and reduces power consumption by more than 50% when compared to 40G non-coherent network deployments.
The POLO 40G allows carriers to address the enormous growth in video and mobile data traffic and enables them to reduce capital and operating expenses by deploying 40Gb/s bandwidth using existing fibre plant.
PMC-Sierra’s combination of high-performance mixed-signal, digital signal processing (DSP), analogue-to-digital converter (ADC), OTN framing and Swizzle Forward Error Correction (FEC) SoC architecture digitally compensates for optical impairments and improves optical performance by more than 2dB for an additional 25% fibre reach extension, which dramatically lowers the cost of transmission.
“Carriers are choosing coherent deployments because it is the most effective technology to increase fibre transmission rates and build all-optical networks,” said Andrew Schmitt, Directing Analyst of Optical at Infonetics Research. “Coherent technology is one of the fundamental technologies of what I call the Optical Reboot: the optical network architecture transformation that will take place this decade.”
PMC-Sierra’s POLO 40G has elevated coherent networking to an unmatched level of integration to meet industry demand for increased fibre transmission rates beyond 10Gb/s. POLO 40G allows carriers to dramatically lower capital costs by eliminating widely deployed optical equipment such as dispersion compensation management (DCM), dispersion compensated fibre (DCF), and the extensive hands-on operational cost of tuning and managing this equipment.
With this solution, OEM line cards can transition from two or three-slot implementations to single-slot. As a result, carriers can more than double faceplate density and reduce power consumption by 50%, as line card tuneable dispersion compensators (TCMs) are no longer required.
“With the explosion of bandwidth demand driving the need to upgrade existing metro, regional and long-haul fibre infrastructures to 40Gb/s and beyond, POLO 40G will be a key enabler to make the optical build-out a reality,” said Daryn Lau, Vice-President and General Manager of PMC-Sierra’s Communication Products Division. “PMC-Sierra has significant experience in delivering innovative products to enable evolving carrier network requirements. Our POLO 40G is positioned to provide the combination of bandwidth per unit, power and cost when compared to existing multi-slot coherent solutions even in cost-sensitive Carrier Ethernet service point-to-point and metro deployments.”
POLO 40G is a single chip CMOS coherent DP-(D)QPSK transmission transceiver that delivers the full set of compensation capabilities, including chromatic dispersion (CD), polarisation mode dispersion (PMD), second order PMD (SOP), and high-rate polarisation tracking, among others.
The platform provides an SFI 5.1 client interface and a fully OIF-compliant line side DP-(D)QPSK interface that seamlessly integrate into MSA optical modules and onto a line card with next generation CFP2 optical modules. POLO 40G also incorporates flash ADC technology with background calibration to maintain operating performance in demanding carrier environments:
• Full Bit Transparent Operation: Supports all FEC overhead rates between 7%-20% and backward compatible with legacy 40Gb/scoherent solutions
• Blind Equalisation and Interoperability: Utilises ITU standard OTL3.4 encoding/decoding for polarisation resolve and ITU standard G.709 FEC to drive broad industry interoperability
• Extended Reach with High Gain 18.8% FEC Option: +2 dB additional OSNR margin provides an additional 25% reach extension over all other 7% enhanced FEC implementations
• Increased Spectral Efficiency: 40Gb/s DP-(D)QPSK is ready made for future 25GHz ITU grid spacing that doubles spectral efficiency from 0.8Bit/s/Hz to 1.6Bit/s/Hz.
PMC-Sierra’s PM6373 POLO 40G will sample later this year for sponsor customers. The device is implemented in 40nm CMOS technology and packaged in a 480-pin 23mm x 23mm FCBGA package. A comprehensive support package, including drivers, datasheets, application notes and reference design material is available.
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