Editorial archive;
Digi-Key broadens PLD range (11 October 2011)
Distributor Digi-Key has announced the addition of Lattice’s MachXO2 PLDs.
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SERDES-capable FPGA (25 February 2011)
Lattice Semiconductor is exhibiting at the Embedded System Conference held in Nuremberg.
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Setting new standards for low-cost, low power designs (08 November 2010)
Lattice Semiconductor has unveiled its new MachXO2 PLD family.
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RRH for wireless infrastructures (27 July 2010)
Lattice has partnered with Affarii to produce a low power RRH solution at 1300mW per antenna.
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Efficient clocking solutions for high-speed serial interface designs (29 March 2010)
Designers of digital systems face new challenges as high speed serial interfaces, using Serialised/Deserialiser (SERDES) technology, replace the more traditional parallel bus architectures. One odf these challenges is with the clocking device. Srirama Chandra discusses a new option.
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Higher performance (11 January 2010)
New feature expands MOSFET options for hot swap designs.
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FPGAs give sensors the right image (30 November 2009)
Image acquisition is the most critical component of security and surveillance video chains, since the ability of image signal processing to extract useful information out of the video stream is only as good as the quality of image capture – in reality the combination of sensor quality and the quality of sensor output processing.
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Low power, low cost RRH solution (18 November 2009)
Lattice Semi and Affarii have developed a 3G/4G-based Remote Radio Head (RRH) solution.
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Fancy new kit (22 September 2009)
Eight new reference designs and two development kits target low power, space constrained applications.
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Developing FPGAs for secure environments (18 May 2009)
Ted Merena examines the options available for securing and protecting FPGA design code and an entire design.
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FPGAs for secure environments (27 April 2009)
Ted Merena examines the options available for securing and protecting FPGA design code and an entire design.
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FPGA design tools (14 January 2009)
Lattice Semiconductor has announced the release of version 7.2 of its ispLEVER FPGA design tool suite.
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Industry's fastest RLDRAM I/II support (23 September 2008)
FPGA-based support for RLDRAM I/II memory devices has been announced by Lattice Semiconductor.
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FPGA performance and design constraints (24 July 2008)
After the HDL model function, design constraints have the next biggest influence over the performance of an FPGA design. However, many designers do not invest enough time to constrain a design
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Flash-based FPGA meets AEC-Q100 (08 July 2008)
Lattice Semiconductor has characterised and qualified its non-volatile LatticeXP2 for automotive standards.
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Alliance for FPGA design and verification (23 April 2008)
Lattice Semiconductor and Aldec have announced a new OEM agreement that will deliver an OEM FPGA mixed language simulator.
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Optical networks challenge receivers (01 November 2007)
Passive optical networks (PON) are based primarily on Ethernet PON (EPON) and Broadband PON (BPON) systems. However, these systems suffer technical limitations in delivering the data to the end user
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Enhanced broadband content (01 September 2007)
Passive optical networks, whether Ethernet or broadband based, have technical limitations in delivering data to the user, but a new specification has been introduced to improve the future of optical networks
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Third-gen NV FPGAs enhance performance (01 July 2007)
Lattice Semiconductor (www.latticesemi.com) has announced its third-generation non volatile FPGAs, the Lattice XP2 family boasting improved power consumption, doubling of density and lower cost per function and footprint over previous generations.
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FPGA fabric adapts for comms protocols (01 February 2007)
Many of today’s electronic designs require high-speed serial I/O techniques to achieve the specified system performance criteria. As such they will continue to need a high-performance FPGA fabric.
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Configurable DAQ uses standard parts (01 October 2006)
When parameters such as temperature and pressure need to be monitored and controlled, a distribution DAQ (data acquisition) network could provide the optimum solution.
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The middle market (01 October 2006)
Traditionally FPGAs have provided design engineers with solutions that address either low cost applications such as simple bus bridges, complex state machines and the like, or high performance applications for example, signal processing, protocol conversion, packet inspection and data path applications.
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