Practical Low Power CPLD design
Ultra low power CPLDs are oncreasingly being used in portable and handheld applications, this white paper will focus on how experienced design engineers can extract the last microwatt from their I/O subsystems.
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ECP3 Power white paper
FPGAs are a popular choice in numerous system designs. A wise selection of FPGAs can significantly aid the designer in reducing the challenges associated with power consumption. This white papers discusses the factors which contribute to power consumption in an FPGA.
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ECP3 high speed serial I/F white paper
The LatticeECP2M and LatticeECP3 low-cost, high performance SERDES-capable FPGA families provide an excellent platform for customers designing next generation systems. They have been designed to exceed the stringent jitter and drive requirements of various commonly used protocols.
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ECP3 DSP White paper
This DSP white paper describes its most recent low-cost, SERDES-capable LatticeECP3 FPGA family. Features such as a dual slice architecture, the ability to cascade/chain DSP slices and blocks and an enhanced instruction set establish the LatticeECP3 family as a compelling alternative for signal processing applications such as FIR filtering and FFT/iFFT implementations.
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F-RAM vs BBSRAM
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